Photo by Cristiano Firmani on Unsplash
In 2010, Intel launched a new architecture-based solution for the high-end workstations. Codenamed Intel Xeon Phi Knights Ferry. It was a co-processor that would allow faster processing and training due to the massively parallel thread and memory level optimization with the help of multiple cores sharing high-end channels and memory. The technology node used was 45nm.
Over the next few years, Intel iterated on the design and launched Knights Corner with 22nm, followed by Knights Landing with 14nm. Knights Landing was a breakthrough architecture, allowing operating systems and applications to run on the architecture itself and eliminating the need to off-load and train. On top of this, the rich set of system and software-level architecture support from Intel and the Open Source community made it easy to use.
On the architectural level, it provided an elegant way to handle threads by using processing elements coupled with powerful but power budget-friendly cores and the ability of vector processing.
On the memory front, the Knight Landings used NUMA and memory modes to speed up the data training. There were supercomputers and data centers that started to utilize this architecture, and, to date, they still do – Tianhe-2 is one such supercomputer.
All these features created a lot of buzzes and focused on Xeon Phi Knights Landing, a breakthrough architecture to compete against the GPU leaders. However, the subsequent few launches of this architecture were supposed to be with sub-10nm, which unfortunately did not go as planned.
Even then, the Xeon Phi series set introduced a new way to stack the cores and package them on a chip. The key was the processing elements (a.k.a Tiles) organized in a grid manner and a combination of high-bandwidth memory that could act in different modes to further speed up the end applications.
Flashback to 2023, Meta launched an accelerator called MTIA V1. It is designed for their in-house workload requirements and will also get deployed in the supercomputers and data centers Meta will run. Though it is not an XPU, it can speed up the applications by focusing on instruction, memory, and thread-level parallelism.
However, after reading through the available details around this MTIA V1. The inspiration for this architecture is, indeed, now obsolete, Intel Xeon Phi Knights Landing.
It is evident not only based on how closely the feature sets are but also the way the MTIA V1 uses architectural features like combining two cores into one processing block and making use of vector support to enable the ability to run multi-threading on the processing elements by utilizing the high-speed cache and lower level memories.
The major differentiating factor between the two is the technology node and how it impacts the TDP. Besides this, MTIA V1 is comparable with Intel Xeon Phi Knights Landing.
Even at the die level, the comparisons show the blocks are placed similarly, including the connections from processing elements to the memory and different interconnections.
This comparison shows that several new AI-focused accelerators and custom chips are looking back at the old designs and improving those for internal requirements. The major innovation is mainly on the software to architecture mapping rather than the architecture itself.
This approach will extend to architecture design (chiplets) more optimized for the AI workloads. It leads to whether these are breakthrough architectures or inspired architecture packaged with new technology nodes and better software mapping solutions.
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