Modern multiprocessor systems-on-chip (MpSoCs) offer tremendous power and performance optimization opportunities by tuning thousands of potential voltage, frequency and core configurations. As the workload phases change at runtime, different configurations may become optimal with respect to power, performance or other metrics. Identifying the optimal configuration at runtime is infeasible due to the large number of workloads and configurations. This paper proposes a novel methodology that can find the Pareto-optimal configurations at runtime as a function of the workload. To achieve this, we perform an extensive offline characterization to find classifiers that map performance counters to optimal configurations. Then, we use these classifiers and performance counters at runtime to choose Pareto-optimal configurations. We evaluate the proposed methodology by maximizing the performance per watt for 18 single- and multi-threaded applications. Our experiments demonstrate an average increase of 93%, 81% and 6% in performance per watt compared to the interactive, ondemand and powersave governors, respectively.
DyPO: Dynamic Pareto-Optimal Configuration Selection for Heterogeneous MpSoCs
- | Published On:


Chetan Arvind Patil
Hi, I am Chetan Arvind Patil (chay-tun – how to pronounce), a semiconductor professional whose job is turning data into products for the semiconductor industry that powers billions of devices around the world. And while I like what I do, I also enjoy biking, working on few ideas, apart from writing, and talking about interesting developments in hardware, software, semiconductor and technology.
COPYRIGHT
2026
, CHETAN ARVIND PATIL
This work is licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License. In other words, share generously but provide attribution.
DISCLAIMER
Opinions expressed here are my own and may not reflect those of others. Unless I am quoting someone, they are just my own views.
RECENT POSTS
Nano Banana Semiconductor Simulator Landscape Modern semiconductor innovation is no longer driven solely by physical experimentation. As device scaling,
Nano Banana Origins of Compute Architecture The earliest computer architectures were defined by scarcity. Transistors were costly, memory was
Nano Banana Silicon Data Is No Longer A By Product In the modern semiconductor industry, data no longer emerges
Nano Banana Strategic Context AI SoC development is now a board-level strategic choice, not just a technical decision. The
Nano Banana Data Center Networking Became A Silicon Problem Data center networking has moved from a background enabler to




